The present invention generally relates to fabrication methods and resulting structures for semiconductor devices. More specifically, the present invention relates to an integrated semiconductor device with vertical field-effect transistors and hybrid channels.
Semiconductor structures or devices can be embodied as vertical field effect transistors (VFETs). Performance and behavior characteristics of VFETs are influenced by the material of the device active regions. For example, p-type and n-type VFETs (p-VFET and n-VFET, respectively) have performance characteristics that depend on a material of the channels. Choosing the appropriate channel material for the different transistor types (e.g. p-VFET and n-VFET) is important in optimizing devices' performance. For example, p-VFETs are known to have better hole mobility using a silicon channel with a (111) or (110) crystal surface orientation (Si (111) or Si (110), respectively) than a silicon channel with a (100) crystal surface orientation (Si (100)). On the other hand n-VFET are known to have better electron mobility using a Si (100) channel than a Si(111) or Si(110) channel. Accordingly, it would be advantageous to provide hybrid channel orientations, namely, Si (100) channel on n-VFET and Si (111) on p-VFET, in a single integrated semiconductor circuit.